Dive deep into MikroTik's RouterBoards and RouterOS. We keep you informed and up-to-date, always.



Every post is penned by our certified MikroTik engineers, ensuring relevance and accuracy in every word.



Your insights drive our content. Sharing knowledge, we elevate the MikroTik community in Canada together.

MikroTik's L3 Hardware Offloading

To CPU or to ASIC, that is the question.

As technology continues to advance, routers are becoming more efficient, leading network administrators to explore software-based router solutions for cost savings and greater control over their network operations. With the proliferation of open-source routing operating systems, this trend is undeniable. However, despite the flexibility these solutions offer, many users face bottlenecks when routing traffic through these high-performance servers. In this article, we will delve into the challenges associated with these bottlenecks and explore how MikroTik's innovative L3 hardware offloading is transforming the networking landscape.

Challenges of CPU-Based Routing

The challenge starts with TCP protocol, The initial packet exchange resembles a conversation where each party awaits an acknowledgment before proceeding. This process places a significant tax on the CPU, especially when dealing with several millions of packets per second.

The TCP/IP stack, struggle to efficiently distribute across multiple cores. A single core may become overwhelmed, reaching 100% utilization and causing two significant issues:


First Issue: Inability to handle additional TCP packets due to the overwhelmed core responsible for SYN/ACK processing.

Second Issue: Even processed packets may experience drops, intensifying the burden on the overtaxed CPU due to modern applications' stringent latency requirements.



ASICs, or Application Specific Integrated Circuits, are specialized chips designed with a singular purpose: to process as many packets as possible efficiently. They handle all the packets passing through the ports, expertly examining incoming and outgoing packets and making routing or switching decisions with remarkable speed and efficiency.

Modern MikroTik routers harness the prowess of highly efficient ARM CPUs for tasks such as managing tunnels, dynamic routing sessions (e.g., BGP or OSPF), NAT, and Firewall Rules. Meanwhile, they delegate the heavy lifting and packet processing responsibilities to the ASICs.

Performance Numbers

MikroTik has introduced L3-aware ASICs in two of its notable CCR series routers. The first in line is the CCR2116-12G-4S+, and its powerhouse sibling is the renowned CCR2216-1G-12XS-2XQ.

Both of these routers are equipped with the impressive AWS Graviton (Alpine AL73400), a 16-core ARMv8 processor designed by Annapurna Labs. However, the distinction comes in the form of their switch chips. The CCR2216 takes the lead with its Marvell Prestera Aldrin2 ASIC, which boasts four 25G lines directly connected to the ARM SOC.

Meanwhile, the CCR2116-12G-4S+ also features the 98DX3255 ASIC with four 10G lines to the SOC.

Below, you'll find the official performance results provided by MikroTik for both of these models:



Let's take a closer look at the CCR2216-1G-12XS-2XQ in both fast path mode and hardware-accelerated L3. We will examine three different metrics, each with varying packet sizes: smaller packets of 64 bytes, medium-sized packets of 512 bytes, and larger packets of 1518 bytes.


  • 2216-svg-64 (1).svg
  • 2216-svg-512 (1).svg
  • 2216-svg-1518 (1).svg


Next, we'll explore the CCR2116-12G-4S+ in both fast path mode and hardware-accelerated L3, examining the same three packet sizes:


  • 2116-SVG-64.svg
  • 2116-SVG-512.svg
  • 2116-SVG-1518.svg

FIB Size

The FIB size within an ASIC is a pivotal factor in determining the capabilities of the hardware. The FIB size within these ASICs directly influences their ability to process and manage routing information efficiently. A larger ASIC FIB size is essential for handling complex network environments with larger routing tables, diverse prefixes, and multiple routes. It essentially shows how many routes can get offloaded simultaneously by the ASIC, making it a key metric in optimizing network performance.


ModelSwitch ChipIPv4 RoutesIPv6 RoutesNexthops
CCR2216-1G-12XS-2XQ98DX852560K - 120K15K - 20K8K
CCR2116-12G-4S+98DX325516K - 36K 4K - 6K8K

Note:  IPv4 and IPv6 routing tables share the same hardware memory.


L3 hardware offloading offers a multitude of advantages that extend well beyond performance optimization. Foremost among these benefits is the significant boost in routing and packet processing speeds, relieving the CPU of its processing load. This allows the CPU to focus on more intricate tasks, such as managing dynamic routing sessions.

Furthermore, L3 hardware offloading promotes energy efficiency by offloading resource-intensive routing operations to specialized hardware, which handles them with remarkable efficiency. This not only enhances performance but also contributes to lower energy consumption.

Additionally, the reduction in processing time for routing decisions leads to lower network latency, a critical factor for real-time applications. Moreover, the scalability afforded by L3 hardware offloading is invaluable, making it suitable for growing network environments as it can effortlessly handle increased traffic loads without overburdening the CPU.

While there may be initial investment costs, the long-term benefits, including improved performance, reduced energy consumption, and decreased maintenance requirements, result in a significantly lower Total Cost of Ownership over time


While L3 hardware offloading offers a range of advantages, it's equally important to consider its inherent limitations and potential drawbacks. One significant constraint lies in the fact that not all routing tasks can be seamlessly offloaded to specialized hardware. Complex routing functions, such as intricate firewall rules or specific protocols like MAC telnet and RoMON, may not receive full support, potentially requiring CPU intervention.

Additionally, L3 hardware offloading can introduce certain inflexibilities into the network architecture, making it challenging to adapt to evolving requirements or implement custom configurations. Moreover, the level of support for various network protocols and features can vary among different L3 hardware offloading implementations, potentially limiting the scope of services a network can deliver.

While L3 hardware offloading can undoubtedly enhance network performance, it's essential to exercise caution in its configuration to mitigate potential security risks. Misconfigurations could inadvertently expose the network to vulnerabilities, underscoring the importance of meticulous setup and ongoing monitoring.

Upgrade Plan

At Wireless Netware, we understand that staying at the forefront of networking is crucial for many businesses. That's why we're here to help you seamlessly transition from older CCR series routers to the new CCr2xxx series, unlocking the full potential of your network.Our team of experienced engineers is always ready to assist you in making the transition to the latest MikroTik routers. We offer comprehensive support and expertise to ensure a smooth upgrade process.

Contact us today, and let our experts guide you through the transition process. We're committed to helping you achieve peak network performance and efficiency.

Remember, at Wireless Netware, we're not just selling routers; we're delivering solutions that empower your network to thrive in the digital age. Make the move to the future of networking today!


MikroTik's incorporation of L3 hardware offloading ASICs in their routers marks a significant stride in network technology. By understanding the intricacies of CPU-based routing and the role of ASICs, we can unlock the full potential of our network infrastructure. If you're eager to explore this project further or discuss how to translate these concepts into production, please don't hesitate to reach out.

MikroTik News